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C++BOLD Example Design: IROD

// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
#ifndef _DCDCH_
#define _DCDCH_
 
#include "voltage_regulators.h"  // DC-to-DC converters
 
// Power supply modules
 
// The two classes below are nearly identical.
 
// They include all required capacitors as well as current sense resistors.
 
 
// 7711 Required capacitors (the 7711 data sheet suggests suitable capacitors):
//   CIN  = 1500 uF
//   COUT =  330 uF
// CP_C594D337X0010R2T is a 330 uF, 10 V tantalum capacitor that meets DC-to-DC requirements
//     594D337X0010R2T is a Vishay Sprague part number
 
class CM_DCDC_7711 : public TModule {
public:
// ports
  port VIN;
  port VOUT;          // final regulated voltage
  port SENSE_VOUT;    // voltage before drop of current sense resistor
  port GND;
 
// member parts
  CP_PT7711C           Regulator;
  CP_R0                R_VID[ 5 ];   // use zero-ohm jumpers to set voltage ID code
  CP_C594D337X0010R2T  Cin[ 6 ];     // 6 * 330 uF less 20% = 1580 uF
  CP_C594D337X0010R2T  Cout;
  CP_MP725_02          Rsense0;      // two resistors required due to high current
  CP_MP725_02          Rsense1;
 
 
  virtual void Register() {
// register all members
    reg(  VIN );
    reg(  VOUT );
    reg(  SENSE_VOUT );
    reg(  GND );
 
    reg(  Regulator );
    rega( R_VID, 5  );
    rega( Cin,  6  );
    reg(  Cout      );
    reg(  Rsense0   );
    reg(  Rsense1   );
  }
 
  virtual void Connect() {
 
  // voltage ID
    "VID" << Regulator.VID;        // give name to internal nets
    for ( int i = 0; i < 5; ++ i ) {
      Regulator.RS_GND   ^  R_VID[ i ] ^  Regulator.VID( i );   // use RS_GND rather than GND for optimal accuracy
    }
 
  // Capacitors
    Regulator.VOUT  <<  Cout.POS;  // output capacitor comes before sense resistor
    for ( int i = 0; i < 6; ++ i ) {
      Regulator.VIN  <<  Cin[ i ].POS;
    }
 
  // sense connections
    GND        <<  Regulator.RS_GND;                                   // user does not get explicit access to RS_GND
    SENSE_VOUT <<  Regulator.VOUT     << Rsense0.A   << Rsense1.A;     // regulator output into sense resistor
    SENSE_VOUT                        << Rsense0.TAB << Rsense1.TAB;   // connect power resistor tab to regulator output for best layout
    VOUT       <<  Regulator.RS_VOUT  << Rsense0.B   << Rsense1.B;     // final regulated voltage
 
 
    VIN << Regulator.VIN;
    wireall( GND  );
 
    "/NC" << Regulator.STBY_N;
    "/NC" << Regulator.SYNC_OUT;   // 7711 only
//  "/NC" << Regulator.OVP_DRIVE;  // 6701 only
//  "/NC" << Regulator.PWR_GOOD;   // 6701 only
//  "/NC" << Regulator.NC;         // 6701 only
 
  }
};
 
 
// 6701 Required capacitors (the 7711 data sheet suggests suitable capacitors):
//   CIN  = 1000 uF
//   COUT =  330 uF
class CM_DCDC_6701 : public TModule {
public:
// ports
  port VIN;
  port VOUT;          // final regulated voltage
  port SENSE_VOUT;    // voltage before drop of current sense resistor
  port PWR_GOOD;      // 6701 only
  port GND;
 
// member parts
  CP_PT6701C           Regulator;
  CP_R0                R_VID[ 5 ];      // use zero-ohm jumpers to set voltage ID code
  CP_C594D337X0010R2T  Cin[ 4 ];        // 4 * 330 uF less 20% = 1056 uF
  CP_C594D337X0010R2T  Cout;
  CP_MP725_02          Rsense;          // current sense resistor
  CP_R10K              PullupPG;        // 6701 only, pullup for PWR_GOOD
 
 
  virtual void Register() {
// register all members
    reg(  VIN );
    reg(  VOUT );
    reg(  SENSE_VOUT );
    reg(  PWR_GOOD   );  // 6701 only
    reg(  GND );
 
    reg(  Regulator );
    rega( R_VID, 5  );
    rega( Cin,   4  );
    reg(  Cout      );
    reg(  Rsense    );
    reg(  PullupPG  );
  }
 
  virtual void Connect() {
 
   PWR_GOOD  <<  Regulator.PWR_GOOD  ^ PullupPG ^  VIN;   // 6701 only
 
 
  // voltage ID
    "VID" << Regulator.VID;        // give name to internal nets
    for ( int i = 0; i < 5; ++ i ) {
      Regulator.RS_GND   ^  R_VID[ i ] ^  Regulator.VID( i );   // use RS_GND rather than GND for optimal accuracy
    }
 
  // Capacitors
    Regulator.VOUT  <<  Cout.POS;  // output capacitor comes before sense resistor
    for ( int i = 0; i < 4; ++ i ) {
      Regulator.VIN  <<  Cin[ i ].POS;
    }
 
  // sense connections
    GND        <<  Regulator.RS_GND;                                   // user does not get explicit access to RS_GND
    SENSE_VOUT <<  Regulator.VOUT     << Rsense.A;     // regulator output into sense resistor
    VOUT       <<  Regulator.RS_VOUT  << Rsense.B;     // final regulated voltage
    VOUT                              << Rsense.TAB;   // connect power resistor heat sink tab to power plane
 
 
    VIN << Regulator.VIN;
    wireall( GND  );
 
    "/NC" << Regulator.STBY_N;
//  "/NC" << Regulator.SYNC_OUT;   // 7711 only
    "/NC" << Regulator.OVP_DRIVE;  // 6701 only
    "/NC" << Regulator.NC;         // 6701 only
 
  }
};
 
#endif