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IROD is a large multiprocessor motherboard.

The processors are organized as two HalfROD's, each containing six Data Processing Units (DPU's). A central Host Processing Unit (HPU) initializes and controls the motherboard and DPU's. The HPU and DPU's are all identical Generic Processing Units (GPU's) consisting of a DSP, memory, and FPGA's.

The IROD design presented here provides only connectors for the processing units. The processing units themselves are replaceable daughter cards not included in this design.

The design illustrates:

Constraint file generation.
Reference designator bases assigned to subsystems.
Reference designator bases assigned within subsystems.
Dynamic registering of FPGA wrapper module members.
User member functions.


NB: This design uses a Designator Text File, irod_old_designators.txt, to manually specify some reference designators.



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