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7.2.1. Simple Connections Between Port Ranges
D          << Ram.D;             // connect             Ram's D port to this module's   D port
A          << Ram.A( 19, 0 );    // connect 20 bits of  Ram's A port to this module's   A port
GND        << Ram.A( 20 );       // connect one bit of  Ram's A port to this module's GND port
WE_N       << Ram.WE_N;          // connect Ram control ports
OE_N       << Ram.OE_N;
RAM_CE_N   << Ram.CE_N;
D(  7, 0 ) << Rom.Q;             // connect Rom's  8-bit Q port to the  8 LSB's of this module's D port
A( 15, 0 ) << Rom.A;             // connect Rom's 16-bit A port to the 16 LSB's of this module's A port
OE_N       << Rom.OE_N;          // connect Rom control ports
ROM_CE_N   << Rom.CE_N;

In this example, Ram and Rom are member parts while D, A, GND, WE_N, OE_N, RAM_CE_N and ROM_CE_N are member ports.

The entire range (e.g., 31-0) of the Ram's D port is connected to the entire range (e.g., 31-0) of the module's D port. The entire range (e.g., 7-0) of the Rom's Q port is connected to a portion (7-0) of the module's D port.

 

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