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C++BOLD Reference Manual

4.4. TPort

TPort provides the means of making connections between modules, parts and bundles. TPort, classes derived from TPort, and instances of such classes are referred to as ports. Because the user will seldom if ever derive a new class from TPort and because TPorts are ubiquitous, the CBOLD framework includes the following typedef:

typedef TPort  port;

I.e., ports can (and should) be declared using port rather than TPort.

A module's member ports act like inter–page ports on a schematic page. A part's member ports are similar to ports or pins on a part on a schematic. Unlike ports on conventional schematics, TPort's have no associated direction (e.g., in/out/io). For more on this topic, see Why does CBOLD Lack an Electrical Rules Checker?

The width and range of a port, i.e, the number and indexes of its individual connections, are specified when the port is registered. For example:

class CM_MyModule : public TModule {
public:
  port  RD;
  port  WR;
  port  DATA;   // AR_BUS(31,0)
  port  ADDR;   // AR_BUS(15,0)
  ...
  virtual void Register() {
    reg(  RD );             // auto_reg
    reg(  WR );             // auto_reg
    regb( DATA, 31, 0 );    // auto_reg
    regb( ADDR, 15, 0 );    // auto_reg
    ...
  }
  ...
};

Single-wide ports are registered with the reg() macro. Ports that represent more than one connection are referred to as bus ports and are registered with the regb() macro. In the example above, the code in Register() was inserted by the auto_reg Support Tool. For auto_reg to properly register bus ports, the user must add AR_BUS() directives in comments as shown. The AR_BUS() directives also serve to document the design by localizing all information about the bus ports.

Modules, parts, and bundles may contain any number of ports. These ports express the interface between their owner and higher levels of the hierarchy.