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User members are member variables and functions whose use is not dictated by CBOLD. They are rarely needed, but occasionally they can be extremely convenient. User members fall into two broad classes: those for private use (typically accessed only from within the module) and those for public use (e.g., accessed by the module's owner).
The following code excerpt from the Irod example design illustrates a private member function,
ConnectDefault(). The function is designed to be called from within the module's Connect(). The function
reduces clutter in Connect(), saves the designer typing, and reduces the chances of error. Using a reference
argument (CP_SN74CBTLV3253& Mux
) rather than a pointer argument enhances readability when the function is called in Connect().
class CM_ClockGeneration : public TModule { public: ... port GND; ... CP_SN74CBTLV3253 Mux_RCLK; // primary FET multiplexers CP_SN74CBTLV3253 Mux_SCLK; CP_SN74CBTLV3253 Mux_TCLK; CP_SN74CBTLV3253 Mux_DCLK; CP_SN74CBTLV3253 Mux_DC_CLK; CP_SN74CBTLV3253 Mux_DX_CLK; CP_SN74CBTLV3253 Mux_HPU_CLK; CP_SN74CBTLV3253 Mux_SYN_BASE; CP_SN74CBTLV3253 SMux_RCLK; // secondary FET multiplexers CP_SN74CBTLV3253 SMux_TCLK; CP_SN74CBTLV3253 SMux_HPU_CLK; CP_SN74CBTLV3253 SMux_SYN_BASE; virtual void Register() {...} private: void ConnectDefault( CP_SN74CBTLV3253& Mux ) { // wiring that is similar for several components GND << Mux.OE1_N << Mux.OE2_N; // always OE'd merge( GND, Mux.B2 ); // mux 2 is never used — ground mux "inputs" "/NC" << Mux.A2; // float mux "output" } public: virtual void Connect() { ... ConnectDefault( Mux_RCLK ); // make default connections for each mux in the module ConnectDefault( Mux_SCLK ); ConnectDefault( Mux_TCLK ); ConnectDefault( Mux_DCLK ); ConnectDefault( Mux_DC_CLK ); ConnectDefault( Mux_DX_CLK ); ConnectDefault( Mux_HPU_CLK ); ConnectDefault( Mux_SYN_BASE ); ConnectDefault( SMux_RCLK ); ConnectDefault( SMux_TCLK ); ConnectDefault( SMux_HPU_CLK ); ConnectDefault( SMux_SYN_BASE ); ... } };
Public member functions are typically used to convey information to a module prior to a call to Register() or Connect(). The information conveyed typically affects the behavior of Register() and/or Connect(). For example, some FPGA's allow the user to select the signaling standard (e.g., LVTTL, GTL, etc.) to be used by each bank of I/O pins. A designer could design a general–purpose FPGA wrapper module that instantiated parts (e.g., resistors for setting the I/O reference voltage for each bank) and wired them appropriately. Such a module would require a member function to allow the module's owner to specify the signaling standard for each bank. It would also need member variables to store the signaling standards. An example of a similar situation is the CM_STD_FPGA module of the Irod example design, which can be found in file std_fpga.h.
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