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C++BOLD Example Design: CRB

// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
#ifndef _CRB_TerminatorsH_
#define _CRB_TerminatorsH_
 
#include "crb_tim_slot.h"     // for Term/TIM interface
#include "headers.h"
#include "resistor_packs.h"
 
// All necessary decoupling capacitors are already included.
 
// CM_Terminators: Terminators for TTC busses
 
class CM_Terminators : public TModule {      // Rod Slot Subsystem
public:
 
// ***** member bundles ***** //
  CB_Term_Tim  Tim;   // interface to TIM
 
// ***** member ports ***** //
  port VCC5;     // 5V
  port VCC3;     // 3.3V
  port GND;
 
 
// ***** member modules and parts ***** //
  CP_RSIP_DUAL_TERM_10  TermL;     // resistor packs
  CP_RSIP_DUAL_TERM_10  TermR;
 
  CP_HEADER3            HeadL;     // headers to wire either VCC5 or VCC3 to resistor packs
  CP_HEADER3            HeadR;
 
  CP_CDC_POS            CDC_L;     // decoupling for resistor packs
  CP_CDC_POS            CDC_R;
 
 
  virtual void Register() {
 
// bundles
    reg(  Tim    );
 
// ports
    reg(  VCC5   );
    reg(  VCC3   );
    reg(  GND    );
 
// parts and modules
    reg( TermL );
    reg( TermR );
    reg( HeadL );
    reg( HeadR );
    reg( CDC_L );
    reg( CDC_R );
  }
 
  virtual void Connect() {
 
    wireall( GND );
                                                          // headers allow use of 3.3V or 5V as Vterm
    VCC3       <<  HeadL.P( 1 )    <<  HeadR.P( 1 );      // <<< label HeadL and HeadR on silkscreen with "5V" and "3.3V"
    VCC5       <<  HeadL.P( 3 )    <<  HeadR.P( 3 );
 
    "VTERM_L"  <<  HeadL.P( 2 )  <<  TermL.POS  <<  CDC_L.POS;   // Vterm
    "VTERM_R"  <<  HeadR.P( 2 )  <<  TermR.POS  <<  CDC_R.POS;
 
    Tim.TTC_L   <<  TermL.T;   // TTC bus connections
    Tim.TTC_R   <<  TermR.T;
 
  }
};
 
#endif