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// This File Generated by: pt_to_h.exe // Source File: xc95144xl_100.pt // Destination File: xc95144xl_100.h #ifndef _xc95144xl_100_h_ #define _xc95144xl_100_h_ // AR_OFF -- auto registration is not needed // THIS FILE IS IN THE PUBLIC DOMAIN. // IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT // NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. class CP_XC95144XL_100 : public TPart { public: port VCC; // 3 pins port VCCIO; // 4 pins port GND; // 8 pins port TCK; port TDI; port TDO; port TMS; port IO1_GTS3; port IO2_GTS4; port IO3_GTS1; port IO4_GTS2; port IO6; port IO7; port IO8; port IO9; port IO10; port IO11; port IO12; port IO13; port IO14; port IO15; port IO16; port IO17; port IO18; port IO19; port IO20; port IO22_GCK1; port IO23_GCK2; port IO24; port IO25; port IO27_GCK3; port IO28; port IO29; port IO30; port IO32; port IO33; port IO34; port IO35; port IO36; port IO37; port IO39; port IO40; port IO41; port IO42; port IO43; port IO46; port IO49; port IO50; port IO52; port IO53; port IO54; port IO55; port IO56; port IO58; port IO59; port IO60; port IO61; port IO63; port IO64; port IO65; port IO66; port IO67; port IO68; port IO70; port IO71; port IO72; port IO73; port IO74; port IO76; port IO77; port IO78; port IO79; port IO80; port IO81; port IO82; port IO85; port IO86; port IO87; port IO89; port IO90; port IO91; port IO92; port IO93; port IO94; port IO95; port IO96; port IO97; port IO99_GSR; CP_XC95144XL_100() { SetPackage( "TQFP100", 100 ); SetReferencePrefix( "U" ); } virtual void Register() { reg( VCC ); VCC.AddPin( "5" ); VCC.AddPin( "57" ); VCC.AddPin( "98" ); reg( VCCIO ); VCCIO.AddPin( "26" ); VCCIO.AddPin( "38" ); VCCIO.AddPin( "51" ); VCCIO.AddPin( "88" ); reg( GND ); GND.AddPin( "21" ); GND.AddPin( "31" ); GND.AddPin( "44" ); GND.AddPin( "62" ); GND.AddPin( "69" ); GND.AddPin( "75" ); GND.AddPin( "84" ); GND.AddPin( "100" ); reg( TCK ); TCK.SetPin( "48" ); reg( TDI ); TDI.SetPin( "45" ); reg( TDO ); TDO.SetPin( "83" ); reg( TMS ); TMS.SetPin( "47" ); reg( IO1_GTS3 ); IO1_GTS3.SetPin( "1" ); reg( IO2_GTS4 ); IO2_GTS4.SetPin( "2" ); reg( IO3_GTS1 ); IO3_GTS1.SetPin( "3" ); reg( IO4_GTS2 ); IO4_GTS2.SetPin( "4" ); reg( IO6 ); IO6.SetPin( "6" ); reg( IO7 ); IO7.SetPin( "7" ); reg( IO8 ); IO8.SetPin( "8" ); reg( IO9 ); IO9.SetPin( "9" ); reg( IO10 ); IO10.SetPin( "10" ); reg( IO11 ); IO11.SetPin( "11" ); reg( IO12 ); IO12.SetPin( "12" ); reg( IO13 ); IO13.SetPin( "13" ); reg( IO14 ); IO14.SetPin( "14" ); reg( IO15 ); IO15.SetPin( "15" ); reg( IO16 ); IO16.SetPin( "16" ); reg( IO17 ); IO17.SetPin( "17" ); reg( IO18 ); IO18.SetPin( "18" ); reg( IO19 ); IO19.SetPin( "19" ); reg( IO20 ); IO20.SetPin( "20" ); reg( IO22_GCK1 ); IO22_GCK1.SetPin( "22" ); reg( IO23_GCK2 ); IO23_GCK2.SetPin( "23" ); reg( IO24 ); IO24.SetPin( "24" ); reg( IO25 ); IO25.SetPin( "25" ); reg( IO27_GCK3 ); IO27_GCK3.SetPin( "27" ); reg( IO28 ); IO28.SetPin( "28" ); reg( IO29 ); IO29.SetPin( "29" ); reg( IO30 ); IO30.SetPin( "30" ); reg( IO32 ); IO32.SetPin( "32" ); reg( IO33 ); IO33.SetPin( "33" ); reg( IO34 ); IO34.SetPin( "34" ); reg( IO35 ); IO35.SetPin( "35" ); reg( IO36 ); IO36.SetPin( "36" ); reg( IO37 ); IO37.SetPin( "37" ); reg( IO39 ); IO39.SetPin( "39" ); reg( IO40 ); IO40.SetPin( "40" ); reg( IO41 ); IO41.SetPin( "41" ); reg( IO42 ); IO42.SetPin( "42" ); reg( IO43 ); IO43.SetPin( "43" ); reg( IO46 ); IO46.SetPin( "46" ); reg( IO49 ); IO49.SetPin( "49" ); reg( IO50 ); IO50.SetPin( "50" ); reg( IO52 ); IO52.SetPin( "52" ); reg( IO53 ); IO53.SetPin( "53" ); reg( IO54 ); IO54.SetPin( "54" ); reg( IO55 ); IO55.SetPin( "55" ); reg( IO56 ); IO56.SetPin( "56" ); reg( IO58 ); IO58.SetPin( "58" ); reg( IO59 ); IO59.SetPin( "59" ); reg( IO60 ); IO60.SetPin( "60" ); reg( IO61 ); IO61.SetPin( "61" ); reg( IO63 ); IO63.SetPin( "63" ); reg( IO64 ); IO64.SetPin( "64" ); reg( IO65 ); IO65.SetPin( "65" ); reg( IO66 ); IO66.SetPin( "66" ); reg( IO67 ); IO67.SetPin( "67" ); reg( IO68 ); IO68.SetPin( "68" ); reg( IO70 ); IO70.SetPin( "70" ); reg( IO71 ); IO71.SetPin( "71" ); reg( IO72 ); IO72.SetPin( "72" ); reg( IO73 ); IO73.SetPin( "73" ); reg( IO74 ); IO74.SetPin( "74" ); reg( IO76 ); IO76.SetPin( "76" ); reg( IO77 ); IO77.SetPin( "77" ); reg( IO78 ); IO78.SetPin( "78" ); reg( IO79 ); IO79.SetPin( "79" ); reg( IO80 ); IO80.SetPin( "80" ); reg( IO81 ); IO81.SetPin( "81" ); reg( IO82 ); IO82.SetPin( "82" ); reg( IO85 ); IO85.SetPin( "85" ); reg( IO86 ); IO86.SetPin( "86" ); reg( IO87 ); IO87.SetPin( "87" ); reg( IO89 ); IO89.SetPin( "89" ); reg( IO90 ); IO90.SetPin( "90" ); reg( IO91 ); IO91.SetPin( "91" ); reg( IO92 ); IO92.SetPin( "92" ); reg( IO93 ); IO93.SetPin( "93" ); reg( IO94 ); IO94.SetPin( "94" ); reg( IO95 ); IO95.SetPin( "95" ); reg( IO96 ); IO96.SetPin( "96" ); reg( IO97 ); IO97.SetPin( "97" ); reg( IO99_GSR ); IO99_GSR.SetPin( "99" ); } }; #endif
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