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$INSERT // THIS FILE IS IN THE PUBLIC DOMAIN. // IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT // NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. $END // parts associated with Xilinx MGT for Virtex 2 pro // Xilinx-specified value: .22 uF, X7R or X5R, 15%, 5V min $PART_NAME MGT_CPOS603 // chip capacitor with POS and GND ports in 603 package $JEDEC_TYPE SRC603 $REF_PREFIX MC // use special prefix --> reference designator may be omitted on silkscreen if part outline is distinctive $PIN_COUNT 2 $PORTS POS 1; GND 2; $ENDPORTS $ENDPART // Xilinx-specified part number: Murata BLM18AG102SN1 $PART_NAME MGT_LCHIP603 // ferrite in 603 package $JEDEC_TYPE SRC603 $REF_PREFIX ML // use special prefix --> reference designator may be omitted on silkscreen if part outline is distinctive $PIN_COUNT 2 $PORTS A 1; B 2; $ENDPORTS $ENDPART // Xilinx-specified part number: Murata BLM15AG102SN1D (Xilinx typo was BLM15A6102SNID) $PART_NAME MGT_LCHIP402 // ferrite in 402 package $JEDEC_TYPE SRC402 $REF_PREFIX ML // use special prefix --> reference designator may be omitted on silkscreen if part outline is distinctive $PIN_COUNT 2 $PORTS A 1; B 2; $ENDPORTS $ENDPART
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