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// This File Generated by: pt_to_h.exe // Source File: xc2vp2_fg256.pt // Destination File: xc2vp2_fg256.h #ifndef _xc2vp2_fg256_h_ #define _xc2vp2_fg256_h_ // AR_OFF -- auto registration is not needed // THIS FILE IS IN THE PUBLIC DOMAIN. // IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT // NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. class CP_XC2VP2_FG256 : public TPart { public: port CCLK; port DONE; port M0; port M1; port M2; port PROG_B; port TCK; port TDI; port TDO; port TMS; port HSWAP_EN; port PWRDWN_B; port RSVD; port DXN; // temperature diode port DXP; port IO_L01P_0__VRN_0; port IO_L01N_0__VRP_0; port IO_L02P_0; port IO_L02N_0; port IO_L03P_0__VREF_0; port IO_L03N_0; port IO_L06P_0; port IO_L06N_0; port IO_L07P_0; port IO_L09P_0__VREF_0; port IO_L09N_0; port IO_L69P_0__VREF_0; port IO_L69N_0; port IO_L74P_0__GCLK6S; port IO_L74N_0__GCLK7P; port IO_L75P_0__GCLK4S; port IO_L75N_0__GCLK5P; port IO_L01P_1__VRN_1; port IO_L01N_1__VRP_1; port IO_L02P_1; port IO_L02N_1; port IO_L03P_1; port IO_L03N_1__VREF_1; port IO_L06P_1; port IO_L06N_1; port IO_L07N_1; port IO_L09P_1; port IO_L09N_1__VREF_1; port IO_L69P_1; port IO_L69N_1__VREF_1; port IO_L74P_1__GCLK0S; port IO_L74N_1__GCLK1P; port IO_L75P_1__GCLK2S; port IO_L75N_1__GCLK3P; port IO_L01P_2__VRN_2; port IO_L01N_2__VRP_2; port IO_L02P_2; port IO_L02N_2; port IO_L03P_2; port IO_L03N_2; port IO_L04P_2; port IO_L04N_2__VREF_2; port IO_L06P_2; port IO_L06N_2; port IO_L85P_2; port IO_L85N_2; port IO_L86P_2; port IO_L86N_2; port IO_L88P_2; port IO_L88N_2__VREF_2; port IO_L90P_2; port IO_L90N_2; port IO_L01P_3__VRN_3; port IO_L01N_3__VRP_3; port IO_L02P_3; port IO_L02N_3; port IO_L03P_3; port IO_L03N_3__VREF_3; port IO_L05P_3; port IO_L05N_3; port IO_L06P_3; port IO_L06N_3; port IO_L85P_3; port IO_L85N_3; port IO_L87P_3; port IO_L87N_3__VREF_3; port IO_L89P_3; port IO_L89N_3; port IO_L90P_3; port IO_L90N_3; port IO_L01P_4__INIT_B; port IO_L01N_4__DOUT; port IO_L02P_4__D1; port IO_L02N_4__D0; port IO_L03P_4__D3; port IO_L03N_4__D2; port IO_L06P_4__VRN_4; port IO_L06N_4__VRP_4; port IO_L07P_4__VREF_4; port IO_L09P_4__VREF_4; port IO_L09N_4; port IO_L69P_4__VREF_4; port IO_L69N_4; port IO_L74P_4__GCLK2P; port IO_L74N_4__GCLK3S; port IO_L75P_4__GCLK0P; port IO_L75N_4__GCLK1S; port IO_L01P_5__CS_B; port IO_L01N_5__RDWR_B; port IO_L02P_5__D7; port IO_L02N_5__D6; port IO_L03P_5__D5; port IO_L03N_5__D4; port IO_L06P_5__VRN_5; port IO_L06N_5__VRP_5; port IO_L07N_5__VREF_5; port IO_L09P_5; port IO_L09N_5__VREF_5; port IO_L69P_5; port IO_L69N_5__VREF_5; port IO_L74P_5__GCLK4P; port IO_L74N_5__GCLK5S; port IO_L75P_5__GCLK6P; port IO_L75N_5__GCLK7S; port IO_L01P_6__VRN_6; port IO_L01N_6__VRP_6; port IO_L02P_6; port IO_L02N_6; port IO_L03P_6; port IO_L03N_6__VREF_6; port IO_L05P_6; port IO_L05N_6; port IO_L06P_6; port IO_L06N_6; port IO_L85P_6; port IO_L85N_6; port IO_L87P_6; port IO_L87N_6__VREF_6; port IO_L89P_6; port IO_L89N_6; port IO_L90P_6; port IO_L90N_6; port IO_L01P_7__VRN_7; port IO_L01N_7__VRP_7; port IO_L02P_7; port IO_L02N_7; port IO_L03P_7; port IO_L03N_7; port IO_L04P_7; port IO_L04N_7__VREF_7; port IO_L06P_7; port IO_L06N_7; port IO_L85P_7; port IO_L85N_7; port IO_L86P_7; port IO_L86N_7; port IO_L88P_7; port IO_L88N_7__VREF_7; port IO_L90P_7; port IO_L90N_7; port RXNPAD18; port RXNPAD19; port RXNPAD6; port RXNPAD7; port RXPPAD18; port RXPPAD19; port RXPPAD6; port RXPPAD7; port TXNPAD18; port TXNPAD19; port TXNPAD6; port TXNPAD7; port TXPPAD18; port TXPPAD19; port TXPPAD6; port TXPPAD7; port AVCCAUXRX18; port AVCCAUXRX19; port AVCCAUXRX6; port AVCCAUXRX7; port AVCCAUXTX18; port AVCCAUXTX19; port AVCCAUXTX6; port AVCCAUXTX7; port VTRXPAD18; port VTRXPAD19; port VTRXPAD6; port VTRXPAD7; port VTTXPAD18; port VTTXPAD19; port VTTXPAD6; port VTTXPAD7; port GNDA18; port GNDA19; port GNDA6; port GNDA7; port VCCO_0; // 3 pins port VCCO_1; // 3 pins port VCCO_2; // 3 pins port VCCO_3; // 3 pins port VCCO_4; // 3 pins port VCCO_5; // 3 pins port VCCO_6; // 3 pins port VCCO_7; // 3 pins port GND; // 28 pins port VBATT; port VCCAUX; // 4 pins port VCCINT; // 8 pins CP_XC2VP2_FG256() { SetPackage( "FG256", 256 ); SetReferencePrefix( "U" ); } virtual void Register() { reg( CCLK ); CCLK.SetPin( "N15" ); reg( DONE ); DONE.SetPin( "P16" ); reg( M0 ); M0.SetPin( "N3" ); reg( M1 ); M1.SetPin( "N2" ); reg( M2 ); M2.SetPin( "P1" ); reg( PROG_B ); PROG_B.SetPin( "D1" ); reg( TCK ); TCK.SetPin( "D16" ); reg( TDI ); TDI.SetPin( "E1" ); reg( TDO ); TDO.SetPin( "E16" ); reg( TMS ); TMS.SetPin( "C16" ); reg( HSWAP_EN ); HSWAP_EN.SetPin( "C1" ); reg( PWRDWN_B ); PWRDWN_B.SetPin( "N14" ); reg( RSVD ); RSVD.SetPin( "D14" ); reg( DXN ); DXN.SetPin( "D3" ); reg( DXP ); DXP.SetPin( "D2" ); reg( IO_L01P_0__VRN_0 ); IO_L01P_0__VRN_0.SetPin( "C3" ); reg( IO_L01N_0__VRP_0 ); IO_L01N_0__VRP_0.SetPin( "C2" ); reg( IO_L02P_0 ); IO_L02P_0.SetPin( "C4" ); reg( IO_L02N_0 ); IO_L02N_0.SetPin( "B3" ); reg( IO_L03P_0__VREF_0 ); IO_L03P_0__VREF_0.SetPin( "A3" ); reg( IO_L03N_0 ); IO_L03N_0.SetPin( "A2" ); reg( IO_L06P_0 ); IO_L06P_0.SetPin( "C5" ); reg( IO_L06N_0 ); IO_L06N_0.SetPin( "D5" ); reg( IO_L07P_0 ); IO_L07P_0.SetPin( "D6" ); reg( IO_L09P_0__VREF_0 ); IO_L09P_0__VREF_0.SetPin( "E7" ); reg( IO_L09N_0 ); IO_L09N_0.SetPin( "E6" ); reg( IO_L69P_0__VREF_0 ); IO_L69P_0__VREF_0.SetPin( "C7" ); reg( IO_L69N_0 ); IO_L69N_0.SetPin( "D7" ); reg( IO_L74P_0__GCLK6S ); IO_L74P_0__GCLK6S.SetPin( "C8" ); reg( IO_L74N_0__GCLK7P ); IO_L74N_0__GCLK7P.SetPin( "D8" ); reg( IO_L75P_0__GCLK4S ); IO_L75P_0__GCLK4S.SetPin( "A8" ); reg( IO_L75N_0__GCLK5P ); IO_L75N_0__GCLK5P.SetPin( "B8" ); reg( IO_L01P_1__VRN_1 ); IO_L01P_1__VRN_1.SetPin( "C15" ); reg( IO_L01N_1__VRP_1 ); IO_L01N_1__VRP_1.SetPin( "C14" ); reg( IO_L02P_1 ); IO_L02P_1.SetPin( "B14" ); reg( IO_L02N_1 ); IO_L02N_1.SetPin( "C13" ); reg( IO_L03P_1 ); IO_L03P_1.SetPin( "A15" ); reg( IO_L03N_1__VREF_1 ); IO_L03N_1__VREF_1.SetPin( "A14" ); reg( IO_L06P_1 ); IO_L06P_1.SetPin( "D12" ); reg( IO_L06N_1 ); IO_L06N_1.SetPin( "C12" ); reg( IO_L07N_1 ); IO_L07N_1.SetPin( "D11" ); reg( IO_L09P_1 ); IO_L09P_1.SetPin( "E11" ); reg( IO_L09N_1__VREF_1 ); IO_L09N_1__VREF_1.SetPin( "E10" ); reg( IO_L69P_1 ); IO_L69P_1.SetPin( "D10" ); reg( IO_L69N_1__VREF_1 ); IO_L69N_1__VREF_1.SetPin( "C10" ); reg( IO_L74P_1__GCLK0S ); IO_L74P_1__GCLK0S.SetPin( "D9" ); reg( IO_L74N_1__GCLK1P ); IO_L74N_1__GCLK1P.SetPin( "C9" ); reg( IO_L75P_1__GCLK2S ); IO_L75P_1__GCLK2S.SetPin( "B9" ); reg( IO_L75N_1__GCLK3P ); IO_L75N_1__GCLK3P.SetPin( "A9" ); reg( IO_L01P_2__VRN_2 ); IO_L01P_2__VRN_2.SetPin( "E15" ); reg( IO_L01N_2__VRP_2 ); IO_L01N_2__VRP_2.SetPin( "E14" ); reg( IO_L02P_2 ); IO_L02P_2.SetPin( "F12" ); reg( IO_L02N_2 ); IO_L02N_2.SetPin( "E13" ); reg( IO_L03P_2 ); IO_L03P_2.SetPin( "F14" ); reg( IO_L03N_2 ); IO_L03N_2.SetPin( "F13" ); reg( IO_L04P_2 ); IO_L04P_2.SetPin( "F16" ); reg( IO_L04N_2__VREF_2 ); IO_L04N_2__VREF_2.SetPin( "F15" ); reg( IO_L06P_2 ); IO_L06P_2.SetPin( "G14" ); reg( IO_L06N_2 ); IO_L06N_2.SetPin( "G13" ); reg( IO_L85P_2 ); IO_L85P_2.SetPin( "G16" ); reg( IO_L85N_2 ); IO_L85N_2.SetPin( "G15" ); reg( IO_L86P_2 ); IO_L86P_2.SetPin( "H13" ); reg( IO_L86N_2 ); IO_L86N_2.SetPin( "G12" ); reg( IO_L88P_2 ); IO_L88P_2.SetPin( "H15" ); reg( IO_L88N_2__VREF_2 ); IO_L88N_2__VREF_2.SetPin( "H14" ); reg( IO_L90P_2 ); IO_L90P_2.SetPin( "J16" ); reg( IO_L90N_2 ); IO_L90N_2.SetPin( "H16" ); reg( IO_L01P_3__VRN_3 ); IO_L01P_3__VRN_3.SetPin( "M14" ); reg( IO_L01N_3__VRP_3 ); IO_L01N_3__VRP_3.SetPin( "M15" ); reg( IO_L02P_3 ); IO_L02P_3.SetPin( "N16" ); reg( IO_L02N_3 ); IO_L02N_3.SetPin( "M16" ); reg( IO_L03P_3 ); IO_L03P_3.SetPin( "M13" ); reg( IO_L03N_3__VREF_3 ); IO_L03N_3__VREF_3.SetPin( "L12" ); reg( IO_L05P_3 ); IO_L05P_3.SetPin( "L13" ); reg( IO_L05N_3 ); IO_L05N_3.SetPin( "L14" ); reg( IO_L06P_3 ); IO_L06P_3.SetPin( "L15" ); reg( IO_L06N_3 ); IO_L06N_3.SetPin( "L16" ); reg( IO_L85P_3 ); IO_L85P_3.SetPin( "K13" ); reg( IO_L85N_3 ); IO_L85N_3.SetPin( "K14" ); reg( IO_L87P_3 ); IO_L87P_3.SetPin( "K15" ); reg( IO_L87N_3__VREF_3 ); IO_L87N_3__VREF_3.SetPin( "K16" ); reg( IO_L89P_3 ); IO_L89P_3.SetPin( "K12" ); reg( IO_L89N_3 ); IO_L89N_3.SetPin( "J13" ); reg( IO_L90P_3 ); IO_L90P_3.SetPin( "J14" ); reg( IO_L90N_3 ); IO_L90N_3.SetPin( "J15" ); reg( IO_L01P_4__INIT_B ); IO_L01P_4__INIT_B.SetPin( "P14" ); reg( IO_L01N_4__DOUT ); IO_L01N_4__DOUT.SetPin( "P15" ); reg( IO_L02P_4__D1 ); IO_L02P_4__D1.SetPin( "P13" ); reg( IO_L02N_4__D0 ); IO_L02N_4__D0.SetPin( "R14" ); reg( IO_L03P_4__D3 ); IO_L03P_4__D3.SetPin( "T14" ); reg( IO_L03N_4__D2 ); IO_L03N_4__D2.SetPin( "T15" ); reg( IO_L06P_4__VRN_4 ); IO_L06P_4__VRN_4.SetPin( "P12" ); reg( IO_L06N_4__VRP_4 ); IO_L06N_4__VRP_4.SetPin( "N12" ); reg( IO_L07P_4__VREF_4 ); IO_L07P_4__VREF_4.SetPin( "N11" ); reg( IO_L09P_4__VREF_4 ); IO_L09P_4__VREF_4.SetPin( "M10" ); reg( IO_L09N_4 ); IO_L09N_4.SetPin( "M11" ); reg( IO_L69P_4__VREF_4 ); IO_L69P_4__VREF_4.SetPin( "P10" ); reg( IO_L69N_4 ); IO_L69N_4.SetPin( "N10" ); reg( IO_L74P_4__GCLK2P ); IO_L74P_4__GCLK2P.SetPin( "P9" ); reg( IO_L74N_4__GCLK3S ); IO_L74N_4__GCLK3S.SetPin( "N9" ); reg( IO_L75P_4__GCLK0P ); IO_L75P_4__GCLK0P.SetPin( "T9" ); reg( IO_L75N_4__GCLK1S ); IO_L75N_4__GCLK1S.SetPin( "R9" ); reg( IO_L01P_5__CS_B ); IO_L01P_5__CS_B.SetPin( "P2" ); reg( IO_L01N_5__RDWR_B ); IO_L01N_5__RDWR_B.SetPin( "P3" ); reg( IO_L02P_5__D7 ); IO_L02P_5__D7.SetPin( "R3" ); reg( IO_L02N_5__D6 ); IO_L02N_5__D6.SetPin( "P4" ); reg( IO_L03P_5__D5 ); IO_L03P_5__D5.SetPin( "T2" ); reg( IO_L03N_5__D4 ); IO_L03N_5__D4.SetPin( "T3" ); reg( IO_L06P_5__VRN_5 ); IO_L06P_5__VRN_5.SetPin( "N5" ); reg( IO_L06N_5__VRP_5 ); IO_L06N_5__VRP_5.SetPin( "P5" ); reg( IO_L07N_5__VREF_5 ); IO_L07N_5__VREF_5.SetPin( "N6" ); reg( IO_L09P_5 ); IO_L09P_5.SetPin( "M6" ); reg( IO_L09N_5__VREF_5 ); IO_L09N_5__VREF_5.SetPin( "M7" ); reg( IO_L69P_5 ); IO_L69P_5.SetPin( "N7" ); reg( IO_L69N_5__VREF_5 ); IO_L69N_5__VREF_5.SetPin( "P7" ); reg( IO_L74P_5__GCLK4P ); IO_L74P_5__GCLK4P.SetPin( "N8" ); reg( IO_L74N_5__GCLK5S ); IO_L74N_5__GCLK5S.SetPin( "P8" ); reg( IO_L75P_5__GCLK6P ); IO_L75P_5__GCLK6P.SetPin( "R8" ); reg( IO_L75N_5__GCLK7S ); IO_L75N_5__GCLK7S.SetPin( "T8" ); reg( IO_L01P_6__VRN_6 ); IO_L01P_6__VRN_6.SetPin( "M3" ); reg( IO_L01N_6__VRP_6 ); IO_L01N_6__VRP_6.SetPin( "M2" ); reg( IO_L02P_6 ); IO_L02P_6.SetPin( "N1" ); reg( IO_L02N_6 ); IO_L02N_6.SetPin( "M1" ); reg( IO_L03P_6 ); IO_L03P_6.SetPin( "M4" ); reg( IO_L03N_6__VREF_6 ); IO_L03N_6__VREF_6.SetPin( "L5" ); reg( IO_L05P_6 ); IO_L05P_6.SetPin( "L4" ); reg( IO_L05N_6 ); IO_L05N_6.SetPin( "L3" ); reg( IO_L06P_6 ); IO_L06P_6.SetPin( "L2" ); reg( IO_L06N_6 ); IO_L06N_6.SetPin( "L1" ); reg( IO_L85P_6 ); IO_L85P_6.SetPin( "K4" ); reg( IO_L85N_6 ); IO_L85N_6.SetPin( "K3" ); reg( IO_L87P_6 ); IO_L87P_6.SetPin( "K2" ); reg( IO_L87N_6__VREF_6 ); IO_L87N_6__VREF_6.SetPin( "K1" ); reg( IO_L89P_6 ); IO_L89P_6.SetPin( "K5" ); reg( IO_L89N_6 ); IO_L89N_6.SetPin( "J4" ); reg( IO_L90P_6 ); IO_L90P_6.SetPin( "J3" ); reg( IO_L90N_6 ); IO_L90N_6.SetPin( "J2" ); reg( IO_L01P_7__VRN_7 ); IO_L01P_7__VRN_7.SetPin( "E2" ); reg( IO_L01N_7__VRP_7 ); IO_L01N_7__VRP_7.SetPin( "E3" ); reg( IO_L02P_7 ); IO_L02P_7.SetPin( "F5" ); reg( IO_L02N_7 ); IO_L02N_7.SetPin( "E4" ); reg( IO_L03P_7 ); IO_L03P_7.SetPin( "F3" ); reg( IO_L03N_7 ); IO_L03N_7.SetPin( "F4" ); reg( IO_L04P_7 ); IO_L04P_7.SetPin( "F1" ); reg( IO_L04N_7__VREF_7 ); IO_L04N_7__VREF_7.SetPin( "F2" ); reg( IO_L06P_7 ); IO_L06P_7.SetPin( "G3" ); reg( IO_L06N_7 ); IO_L06N_7.SetPin( "G4" ); reg( IO_L85P_7 ); IO_L85P_7.SetPin( "G1" ); reg( IO_L85N_7 ); IO_L85N_7.SetPin( "G2" ); reg( IO_L86P_7 ); IO_L86P_7.SetPin( "H4" ); reg( IO_L86N_7 ); IO_L86N_7.SetPin( "G5" ); reg( IO_L88P_7 ); IO_L88P_7.SetPin( "H2" ); reg( IO_L88N_7__VREF_7 ); IO_L88N_7__VREF_7.SetPin( "H3" ); reg( IO_L90P_7 ); IO_L90P_7.SetPin( "J1" ); reg( IO_L90N_7 ); IO_L90N_7.SetPin( "H1" ); reg( RXNPAD18 ); RXNPAD18.SetPin( "T13" ); reg( RXNPAD19 ); RXNPAD19.SetPin( "T7" ); reg( RXNPAD6 ); RXNPAD6.SetPin( "A7" ); reg( RXNPAD7 ); RXNPAD7.SetPin( "A13" ); reg( RXPPAD18 ); RXPPAD18.SetPin( "T12" ); reg( RXPPAD19 ); RXPPAD19.SetPin( "T6" ); reg( RXPPAD6 ); RXPPAD6.SetPin( "A6" ); reg( RXPPAD7 ); RXPPAD7.SetPin( "A12" ); reg( TXNPAD18 ); TXNPAD18.SetPin( "T10" ); reg( TXNPAD19 ); TXNPAD19.SetPin( "T4" ); reg( TXNPAD6 ); TXNPAD6.SetPin( "A4" ); reg( TXNPAD7 ); TXNPAD7.SetPin( "A10" ); reg( TXPPAD18 ); TXPPAD18.SetPin( "T11" ); reg( TXPPAD19 ); TXPPAD19.SetPin( "T5" ); reg( TXPPAD6 ); TXPPAD6.SetPin( "A5" ); reg( TXPPAD7 ); TXPPAD7.SetPin( "A11" ); reg( AVCCAUXRX18 ); AVCCAUXRX18.SetPin( "R13" ); reg( AVCCAUXRX19 ); AVCCAUXRX19.SetPin( "R7" ); reg( AVCCAUXRX6 ); AVCCAUXRX6.SetPin( "B7" ); reg( AVCCAUXRX7 ); AVCCAUXRX7.SetPin( "B13" ); reg( AVCCAUXTX18 ); AVCCAUXTX18.SetPin( "R11" ); reg( AVCCAUXTX19 ); AVCCAUXTX19.SetPin( "R5" ); reg( AVCCAUXTX6 ); AVCCAUXTX6.SetPin( "B5" ); reg( AVCCAUXTX7 ); AVCCAUXTX7.SetPin( "B11" ); reg( VTRXPAD18 ); VTRXPAD18.SetPin( "R12" ); reg( VTRXPAD19 ); VTRXPAD19.SetPin( "R6" ); reg( VTRXPAD6 ); VTRXPAD6.SetPin( "B6" ); reg( VTRXPAD7 ); VTRXPAD7.SetPin( "B12" ); reg( VTTXPAD18 ); VTTXPAD18.SetPin( "R10" ); reg( VTTXPAD19 ); VTTXPAD19.SetPin( "R4" ); reg( VTTXPAD6 ); VTTXPAD6.SetPin( "B4" ); reg( VTTXPAD7 ); VTTXPAD7.SetPin( "B10" ); reg( GNDA18 ); GNDA18.SetPin( "P11" ); reg( GNDA19 ); GNDA19.SetPin( "P6" ); reg( GNDA6 ); GNDA6.SetPin( "C6" ); reg( GNDA7 ); GNDA7.SetPin( "C11" ); reg( VCCO_0 ); VCCO_0.AddPin( "F8" ); VCCO_0.AddPin( "F7" ); VCCO_0.AddPin( "E8" ); reg( VCCO_1 ); VCCO_1.AddPin( "F9" ); VCCO_1.AddPin( "F10" ); VCCO_1.AddPin( "E9" ); reg( VCCO_2 ); VCCO_2.AddPin( "H12" ); VCCO_2.AddPin( "H11" ); VCCO_2.AddPin( "G11" ); reg( VCCO_3 ); VCCO_3.AddPin( "K11" ); VCCO_3.AddPin( "J12" ); VCCO_3.AddPin( "J11" ); reg( VCCO_4 ); VCCO_4.AddPin( "M9" ); VCCO_4.AddPin( "L9" ); VCCO_4.AddPin( "L10" ); reg( VCCO_5 ); VCCO_5.AddPin( "M8" ); VCCO_5.AddPin( "L8" ); VCCO_5.AddPin( "L7" ); reg( VCCO_6 ); VCCO_6.AddPin( "K6" ); VCCO_6.AddPin( "J6" ); VCCO_6.AddPin( "J5" ); reg( VCCO_7 ); VCCO_7.AddPin( "H6" ); VCCO_7.AddPin( "H5" ); VCCO_7.AddPin( "G6" ); reg( GND ); GND.AddPin( "T16" ); GND.AddPin( "T1" ); GND.AddPin( "R2" ); GND.AddPin( "R15" ); GND.AddPin( "L6" ); GND.AddPin( "L11" ); GND.AddPin( "K9" ); GND.AddPin( "K8" ); GND.AddPin( "K7" ); GND.AddPin( "K10" ); GND.AddPin( "J9" ); GND.AddPin( "J8" ); GND.AddPin( "J7" ); GND.AddPin( "J10" ); GND.AddPin( "H9" ); GND.AddPin( "H8" ); GND.AddPin( "H7" ); GND.AddPin( "H10" ); GND.AddPin( "G9" ); GND.AddPin( "G8" ); GND.AddPin( "G7" ); GND.AddPin( "G10" ); GND.AddPin( "F6" ); GND.AddPin( "F11" ); GND.AddPin( "B2" ); GND.AddPin( "B15" ); GND.AddPin( "A16" ); GND.AddPin( "A1" ); reg( VBATT ); VBATT.SetPin( "D15" ); reg( VCCAUX ); VCCAUX.AddPin( "R16" ); VCCAUX.AddPin( "R1" ); VCCAUX.AddPin( "B16" ); VCCAUX.AddPin( "B1" ); reg( VCCINT ); VCCINT.AddPin( "N4" ); VCCINT.AddPin( "N13" ); VCCINT.AddPin( "M5" ); VCCINT.AddPin( "M12" ); VCCINT.AddPin( "E5" ); VCCINT.AddPin( "E12" ); VCCINT.AddPin( "D4" ); VCCINT.AddPin( "D13" ); } }; #endif
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