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$INSERT
// THIS FILE IS IN THE PUBLIC DOMAIN.
// IT IS PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT
// NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 
$END
 
// ROD backplane connectors: J0/P0, J5/P5, J6/P6
 
$PART_NAME ROD_J0P0
$JEDEC_TYPE CONN_2MM_6X19    // 6x19 pin metric connector
$REF_PREFIX P
$PIN_COUNT 114
$PORTS
  NEGV2    B1;    // layout arranged for best routing of these power signals from P1
  NEGV1    C1;
  POSV2    D1;
  POSV1    E1;
 
  DCLKOP   A18;
  DCLKON   A19;
  NC[2]    A16  C19;  // spare pins
 
  GND[49]          A17         A14     A12     A10     A8      A6      A4      A2  A1
           B19 B18 B17             B13             B9              B5          B2
                           C15             C11             C7                  C2
                   D17             D13             D9              D5          D2
           E19             E15             E11             E7                  E2
           F19 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9  F8  F7  F6  F5  F4  F3  F2  F1  ;
 
  DG[56:0]  A3  B3  C3  D3  E3
                B4  C4  D4  E4
            A5      C5      E5
                B6  C6  D6  E6
            A7  B7      D7
                B8  C8  D8  E8
            A9      C9      E9
                B10 C10 D10 E10
            A11 B11     D11
                B12 C12 D12 E12
            A13     C13     E13
                B14 C14 D14 E14
            A15 B15     D15
                B16 C16 D16 E16
                    C17     E17
                    C18 D18 E18
                        D19     ;
$ENDPORTS
$ENDPART
 
 
// BG location summary:
//  P2 (40 total):  BG_B0[15:0]     // P2 connections are made via standard VME connector, see Backplane.h
//                  BG_A0[15:0]
//                  BG_B1[15:8]
 
//  P5 (72 total):  BG_B1[ 7:0]     // in this file
//                  BG_A1[15:0]
//                  BG_B2[15:0]
//                  BG_A2[15:0]
//                  BG_B3[15:0]
 
//  P6 (80 total):  BG_A3[15:0]     // in this file
//                  BG_B4[15:0]
//                  BG_A4[15:0]
//                  BG_B5[15:0]
//                  BG_A5[15:0]
 
 
$PART_NAME ROD_J5P5
$JEDEC_TYPE CONN_2MM_6X22    // 6x22 pin metric connector
$REF_PREFIX P
$PIN_COUNT 132
$PORTS
  RCLKIP  A1;
  RCLKOP  B1;
  SCLKOP  C1;
  TCLKOP  D1;
 
  RCLKIN  A2;
  RCLKON  B2;
  SCLKON  C2;
  TCLKON  D2;
 
  BUSY_N  E3;
 
  VPOS5[6]    B6  B7  B8  B9  B10 B11;    // connected on backplane to VME 5V and 3.3V power supplies
  VPOS3_3[6]  B17 B18 B19 B20 B21 B22;
 
  GND[39]                                   A14                                         A3
                                                                                        B3
                    C20             C16             C12             C8              C4  C3
                                                                                        D3
            E22             E18             E14             E10             E6              E2  E1
            F22 F21 F20 F19 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9  F8  F7  F6  F5  F4  F3  F2  F1  ;
 
 
  BG_B1[7:0]   A4  B4      D4  E4
               A5  B5  C5  D5       ;
  BG_A1[15:0]                  E5
               A6      C6  D6
               A7      C7  D7  E7
               A8          D8  E8
               A9      C9  D9  E9
               A10              ;
  BG_B2[15:0]          C10 D10
               A11     C11 D11 E11
               A12 B12     D12 E12
               A13 B13 C13 D13 E13
                   B14              ;
  BG_A2[15:0]          C14 D14
               A15 B15 C15 D15 E15
               A16 B16     D16 E16
               A17     C17 D17 E17
               A18                  ;
  BG_B3[15:0]          C18 D18
               A19     C19 D19 E19
               A20         D20 E20
               A21     C21 D21 E21
               A22     C22 D22      ;
$ENDPORTS
$ENDPART
 
 
 
$PART_NAME ROD_J6P6
$JEDEC_TYPE CONN_2MM_6X25    // 6x25 pin metric connector
$REF_PREFIX P
$PIN_COUNT 150
$PORTS
  TCLKIP  C24;
  TCLKIN  C25;
 
  VPOS5[2]    D24 D25;                    // connected on backplane to VME 5V and 3.3V power supplies
  VPOS3_3[6]  B18 B19 B21 B22 B24 B25;
 
  GND[44]                           A17                 A12             A8              A4
            B23         B20         B17
            C23                                 C14             C10             C6              C2
            D23                 D18
                        E20             E16             E12             E8              E4
    F25 F24 F23 F22 F21 F20 F19 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9  F8  F7  F6  F5  F4  F3  F2  F1  ;
 
  TG[15:0]  B16 C16 C17 C18 C19 C20 C21 C22
                        A18 A19 A20 A21 A22 A23 A24 A25 ;
 
  BG_A3[15:0]  A1  B1  C1  D1  E1
               A2  B2      D2  E2
               A3  B3  C3  D3  E3
                   B4  C4           ;
  BG_B4[15:0]              D4
               A5  B5  C5  D5  E5
               A6  B6      D6  E6
               A7  B7  C7  D7  E7
                   B8               ;
  BG_A4[15:0]          C8  D8
               A9  B9  C9  D9  E9
               A10 B10     D10 E10
               A11 B11 C11 D11 E11  ;
  BG_B5[15:0]      B12 C12 D12
               A13 B13 C13 D13 E13
               A14 B14     D14 E14
               A15 B15 C15 D15      ;
  BG_A5[15:0]                  E15
               A16         D16
                           D17 E17
                               E18
                           D19 E19
                           D20
                           D21 E21
                           D22 E22
                               E23
                               E24
                               E25  ;
$ENDPORTS
$ENDPART
 
 
// VME64 P2 with ROD-specific user-defined pins
$PART_NAME VME64_P2R
$JEDEC_TYPE DIN160P_RT  //DIN 32 x 5 right angle plug
$REF_PREFIX P
$PIN_COUNT 160
$PORTS
  D[31:16]   B30 B29 B28 B27 B26 B25 B24 B23
             B21 B20 B19 B18 B17 B16 B15 B14 ;
 
  A[31:24]   B11 B10 B9  B8  B7  B6  B5  B4 ;
 
  RETRY_N    B3 ;
 
  VPOS5[3]   B1  B13 B32 ;   // VME name: +5V
 
  GND[70]    B2  B12 B22 B31                    // standard VME
             Z2  Z4  Z6  Z8  Z10 Z12 Z14 Z16    // additional for VME64x
             Z18 Z20 Z22 Z24 Z26 Z28 Z30 Z32
             D31                                // mate-first-break-last
             D4                                 // for ROD: user-defined pins used for ground
             C32 C31 C30 C29 C28 C27 C26 C25
             C24 C23 C22 C21 C20 C19 C18 C17
             C16 C15 C14 C13 C12 C11 C10 C9
             C8  C7  C6  C5  C4  C3  C2
             A32 A31     A29     A27     A25
                 A23     A21     A19     A17
                 A15     A13     A11     A9
                 A7      A5      A3  A2        ;
 
  NC[11]      Z1  A1  C1                        // for ROD: spare user-defined pins
              D1  D2                            // make-first-break last
              D3  Z3  A12 A14 A24 A26;
 
 
                    // for ROD: Row A user-defined pins
  TMS         A4;   // JTAG to transition module
  TDI         A6;
  TDO         A8;
  TCK         A10;
  CCLK        A16;  // FPGA configuration to transition module
  DIN         A18;
  PROGRAM0_N  A20;
  PROGRAM1_N  A22;
  TMP_N       A28;  // transition module present, pulled high on ROD, grounded on TM
  RESET_N     A30;  // reset to transition module
 
 
                                  // Additional row Z and D for VME64x
  VPC        D32 ;                // mate-first-break-last
                                  // for ROD:  user-defined pins
  BG_B0[15:0]  Z5     D5
                      D6
               Z7     D7
                      D8
               Z9     D9
                      D10
               Z11    D11
                      D12
               Z13    D13
                      D14
               Z15          ;
  BG_A0[15:0]         D15
                      D16
               Z17    D17
                      D18
               Z19    D19
                      D20
               Z21    D21
                      D22
               Z23    D23
                      D24
               Z25    D25   ;
  BG_B1[15:8]         D26
               Z27    D27
                      D28
               Z29    D29
                      D30
               Z31          ;
 
$ENDPORTS
$ENDPART

 

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